Build the Perfect Etch — With the Right Wafer
From KOH grooves to DRIE microstructures, UniversityWafer provides orientation-specific silicon, SOI, and mask films optimized for anisotropic etching.Get Your Quote FAST! Or, Buy Online and Start Researching Today!
Why Anisotropic Etching Matters
Unlike isotropic chemistries that undercut equally in all directions, anisotropic methods remove silicon faster on certain planes and much slower on others. In wet etching (KOH/TMAH), Si(111) is extremely slow, so features on Si(100) naturally terminate at ~54.7° sidewalls. In dry plasma (RIE/DRIE), ion directionality and sidewall passivation maintain vertical profiles for high-aspect-ratio trenches. The right substrate + mask stack increases yield, dimensional fidelity, and surface quality.
Popular Substrates & Films (Ship Fast)
- Prime silicon wafers — common choices: 100 mm and 150 mm, ⟨100⟩, DSP, >10 kΩ-cm for uniform KOH/TMAH behavior.
- SOI wafers — BOX provides a precise wet-etch stop; specify device/BOX/handle thickness and dopant.
- Thermal oxide (SiO2) — wet or dry growth from 100 nm to multi-micron; commonly 1–3 µm for KOH/TMAH masks.
- Silicon nitride (Si3N4) — excellent KOH resistance; LPCVD films for long mask life.
- Microfluidics-ready silicon — for V-grooves, capillaries, and channel masters.
Spec Tips for KOH/TMAH Layouts
- Orientation: Start with ⟨100⟩ to obtain self-limiting {111} facets; align mask edges to ⟨110⟩ for predictable V-grooves.
- Mask choice: Use Si3N4 for longest KOH lifetime; thick SiO2 works when budget or process requires.
- Etch-stops: Prefer SOI BOX for clean stops; heavy boron epi is another classic wet stop.
- Corner compensation: Add serifs/notches on convex corners to control undercut and preserve final geometry.
When to Choose Dry Etching
If you need vertical sidewalls, deeply etched vias, or features insensitive to crystal plane exposure, specify plasma processes. Your material stack still matters: pair your etch with hard masks (oxide/nitride) and the correct resist thickness to maintain selectivity at high aspect ratio.
Typical Requests We Fulfill
- 100 mm ⟨100⟩ DSP, >10 kΩ-cm, thermally oxidized 2–3 µm for KOH cavity etches.
- 150 mm SOI: 10 µm device / 1 µm BOX / 725 µm handle for MEMS diaphragms.
- 100 mm ⟨100⟩ with 200 nm Si3N4 LPCVD for extended KOH runs.
What Is Anisotropic Etching?
Anisotropic etching removes material directionally so that some crystal planes etch much more slowly than others. In silicon, this directional selectivity is exploited to form high-aspect-ratio features, V-grooves, cavities, and through-wafer structures for MEMS and IC processing. Compared with isotropic etches, anisotropic methods deliver straighter sidewalls, predictable facets, and tighter dimensional control.
Wet Etching: KOH vs. TMAH
KOH (potassium hydroxide) and TMAH (tetramethylammonium hydroxide) are the most common wet anisotropic silicon etchants. Both exhibit very low etch rates on Si(111) relative to Si(100), enabling well-defined facets; TMAH is often preferred for CMOS-compatible flows to avoid alkali contamination and for its favorable selectivity windows to SiO2/Si3N4 at certain concentrations. Typical TMAH processes use ~20–25% solutions at 70–90 °C with ~0.5–1 µm/min Si(100) rates, while KOH rates depend on concentration and temperature and can be modified with IPA.
- Contamination: TMAH avoids potassium; often chosen for front-end compatibility.
- Masks: Si3N4 is the most KOH-resistant “hard mask”; SiO2 also used with reduced lifetime.
- Additives: IPA in KOH can smooth surfaces and influence (111) behavior.
Dry Etching: RIE and DRIE
Reactive-ion etching (RIE) provides directional (anisotropic) profiles using plasma chemistry (e.g., fluorocarbon, chlorine) with ion-assisted reactions; DRIE (Bosch/varying chemistries) alternates passivation/etch to achieve deep, steep-walled trenches and vias far beyond conventional RIE depths — critical for through-silicon and MEMS structures.
Crystal Orientation & Feature Geometry
On Si(100), KOH/TMAH form sidewalls that terminate on slow-etching {111} planes, producing characteristic V-grooves with ~54.7° walls; Si(111) etches orders of magnitude slower than Si(100), enabling self-limited facets and flat bottoms when properly designed. Orientation choice therefore controls final geometry and undercut behavior at corners.
Mask Materials & Selectivity
Thermally grown SiO2 and LPCVD/PECVD Si3N4 are standard wet-etch masks; nitride offers superior resistance in KOH. Metals like Cr can serve as alkaline-stable masks in special flows. Dry etch masks vary by chemistry, but typical stacks include photoresist, SiO2/Si3N4, and hard masks tailored to selectivity and aspect ratio.
Etch-Stop Strategies
Common stops include the buried oxide of an SOI wafer (for wet and dry etches) and heavy boron doping (>1019 cm⁻³), which drastically slows KOH rates; B-doped epitaxial layers are classic wet etch-stops, while electrochemical stops and p–n junction biasing are also used in certain MEMS flows.
Corner Compensation & Layout Tips
Convex corners in wet anisotropic etching tend to undercut; designers add “compensation” polygons (serifs/fillets) to preserve final shape. Compensation pattern choice depends on etchant, orientation, and target depth. Early inclusion of orientation flats and compensation features in the mask set prevents geometry loss.
Typical Use Cases
- V-grooves for fiber alignment and capillaries in microfluidics.
- Through-wafer vias and cavities for MEMS sensors/actuators (wet for facets; DRIE for deep vias).
- Optical benches and low-defect FZ silicon structures where crystal perfection improves uniformity.
Recommended Substrates & Materials
- Si(100) prime DSP wafers (orientation-controlled for KOH/TMAH); align flats to ⟨110⟩ for feature directionality.
- Thermal SiO2 (1–3 µm) and Si3N4 masks for wet etching.
- SOI for accurate stop on BOX; SiC, sapphire, and GaAs where anisotropic chemistries or RIE/DRIE are preferred.
Quick Sourcing (Quotes & In-Stock)
Get a fast quote or buy online via our portal: order.universitywafer.com — Common requests include 100 mm Si(100) >10 kΩ-cm SSP for KOH (align flats to ⟨110⟩), DSP with 2–3 µm thermal oxide, and SOI with BOX stops.